Sam Zeloof isn’t your ordinary 22-year-old undergrad student at Carnegie Mellon University, but one that has already created two homemade silicon chips. That’s right, his first one, the Z1, was created back in 2016 when he was still a high school student. Unlike its predecessor, the Z2 utilizes faster-switching transistor design based on wafers of a form of crystalline silicon known as polysilicon, and consists of a grid of 12 circuits, each with 100 transistors for a combined total of 1,200 transistors. Read more for a video and additional information.
The next step was etching each chip with acid before cooking them in 1,000° C furnace to bake in phosphorus atoms to adjust its conductivity. Transistors on Zeloof’s second-generation chips are approximately 10 times faster than those on his first and boasts features as small as 10 microns. One caveat: the Z2 is N-MOS technology, which means that no complementary logic can be implemented, thus possibly resulting in lower static power consumption.
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The chip is small, about one quarter the die area of my previous ICs (2.4mm^2) which makes it hard to probe. There’s a simple 10×10 array of N-channel FETs on each chip which will give me a lot of characterization data. Since it’s such a simple design, I was able to lay it out using Photoshop,” said Zeloof.
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