{"id":89178,"date":"2025-08-09T20:24:40","date_gmt":"2025-08-09T20:24:40","guid":{"rendered":"https:\/\/mailinvest.blog\/index.php\/2025\/08\/09\/xconns-new-pcie-gen-6-switch-might-shake-up-ai-data-centers-faster-than-anyone-expected\/"},"modified":"2025-08-09T20:25:43","modified_gmt":"2025-08-09T20:25:43","slug":"xconns-new-pcie-gen-6-switch-might-shake-up-ai-data-centers-faster-than-anyone-expected","status":"publish","type":"post","link":"https:\/\/mailinvest.blog\/index.php\/2025\/08\/09\/xconns-new-pcie-gen-6-switch-might-shake-up-ai-data-centers-faster-than-anyone-expected\/","title":{"rendered":"XConn\u2019s new PCIe Gen 6 switch might shake up AI data centers faster than anyone expected"},"content":{"rendered":"<p> <a href=\"https:\/\/go.fiverr.com\/visit\/?bta=1052423&nci=17043\" Target=\"_Top\"><img loading=\"lazy\" decoding=\"async\" border=\"0\" src=\"https:\/\/mailinvest.blog\/wp-content\/themes\/breek\/assets\/images\/transparent.gif\" data-lazy=\"true\" data-src=\"https:\/\/fiverr.ck-cdn.com\/tn\/serve\/?cid=40081059\"  width=\"601\" height=\"201\"><\/a>\n<br \/><img decoding=\"async\" src=\"https:\/\/mailinvest.blog\/wp-content\/themes\/breek\/assets\/images\/transparent.gif\" data-lazy=\"true\" data-src=\"https:\/\/cdn.mos.cms.futurecdn.net\/eVKWbLXWs2LyYYd2QDkMVX-1200-80.png\" \/><\/p>\n<div id=\"article-body\">\n<hr id=\"163c1829-9e63-461c-9e1f-b681b908932a\"\/>\n<ul id=\"9a541df8-adaa-4508-9353-8cea6d8e6901\">\n<li><strong>Apollo 2 change helps Gen 6.2 and CXL 3.1 inside a single hybrid chip<\/strong><\/li>\n<li><strong>XConn desires to redefine bandwidth limits, however real-world outcomes stay fully untested<\/strong><\/li>\n<li><strong>Intel and XConn are collaborating to check full-stack compatibility in PCIe-based ecosystems<\/strong><\/li>\n<\/ul>\n<hr id=\"aaa555ff-7b8c-474a-b8cd-023e1854ef0e\"\/>\n<p id=\"6e73c24b-1133-4598-9983-ac4130f7d51d\">XConn Applied sciences is getting ready to reveal what it describes as a completely built-in, end-to-end PCIe Gen 6.2 and CXL 3.1 resolution on the upcoming Way forward for Reminiscence and Storage (FMS25) occasion.<\/p>\n<p>The corporate is positioning the launch as a essential step towards assembly the efficiency wants of AI and information middle workloads.<\/p>\n<p><a id=\"elk-seasonal\" data-url=\"\" href=\"\" data-hl-processed=\"none\"\/><\/p>\n<aside data-block-type=\"embed\" data-render-type=\"fte\" data-skip=\"dealsy\" data-widget-type=\"seasonal\" class=\"hawk-base\"\/>\n<p id=\"6e73c24b-1133-4598-9983-ac4130f7d51d-2\">However, as with any early-stage technology demo, real-world scalability and reliability are still open questions.<\/p>\n<aside data-component-name=\"Recirculation:ArticleRiver\" data-nosnippet=\"\" class=\"clear-both pt-3 pb-4 mb-4 border-solid border-y border-neutral-300\">\n<span class=\"font-article-heading block pb-3 !text-base font-bold uppercase sm:text-sm text-[#333]\"><br \/>\nYou may like<br \/>\n<\/span><\/p>\n<\/aside>\n<p><a id=\"elk-c07b6020-c141-490a-a450-155678e50a90\" data-url=\"\" href=\"\" data-hl-processed=\"none\"\/><\/p>\n<h2 id=\"hybrid-switch-with-theoretical-flexibility-3\">Hybrid switch with theoretical flexibility<\/h2>\n<p id=\"cd2c02fb-d1e2-4575-bef2-e58e65bd58c0\">The company\u2019s Apollo 2 switch will be the core of this unveiling &#8211; marketed as the industry\u2019s first hybrid switch to support both PCIe Gen 6.2 and CXL 3.1 within a single chip, it is said to simplify interconnect designs and enhance scalability.<\/p>\n<p>&#8220;XConn is excited to bring to market PCIe Gen 6.2 and CXL 3.1 switches, with samples now available,&#8221; said Gerry Fan, CEO of XConn Technologies.<\/p>\n<p>&#8220;As the industry accelerates toward more memory-centric and performance-intensive architectures, our commitment is to empower customers with best-in-class.&#8221;<\/p>\n<p>These benefits are aimed at reducing complexity in data centers while enabling broader architectural flexibility.<\/p>\n<div id=\"slice-container-newsletterForm-articleInbodyContent-9HYhvKV78n52hPUeyeMfT5\" class=\"slice-container newsletter-inbodyContent-slice newsletterForm-articleInbodyContent-9HYhvKV78n52hPUeyeMfT5 slice-container-newsletterForm\">\n<div data-hydrate=\"true\" class=\"newsletter-form__wrapper newsletter-form__wrapper--inbodyContent\">\n<div class=\"newsletter-form__container\">\n<section class=\"newsletter-form__top-bar\"\/>\n<section class=\"newsletter-form__main-section\">\n<p class=\"newsletter-form__strapline\">Sign up to the TechRadar Pro newsletter to get all the top news, opinion, features and guidance your business needs to succeed!<\/p>\n<\/section>\n<\/div>\n<\/div>\n<\/div>\n<p>Although technically promising, the actual advantage of such integration will depend on performance outcomes under production-grade workloads.<\/p>\n<p>XConn\u2019s collaboration with <a data-analytics-id=\"inline-link\" href=\"https:\/\/www.techradar.com\/tag\/intel\" data-auto-tag-linker=\"true\" data-before-rewrite-localise=\"https:\/\/www.techradar.com\/tag\/intel\">Intel<\/a> can be being positioned as a serious growth, as based on Intel Senior Fellow Ronak Singhal, the partnership will assist be sure that each software program and {hardware} elements work together easily, providing \u201cstrong end-to-end options.\u201d<\/p>\n<p>The businesses anticipate this effort to foster an interoperable setting for PCIe and CXL applied sciences.<\/p>\n<p>Nonetheless, previous experiences within the business recommend that profitable validation usually takes time and a couple of demo cycle.<\/p>\n<p>The upcoming demo will showcase low-latency, high-bandwidth switching, highlighting the infrastructure\u2019s readiness for purposes resembling AI\/ML mannequin coaching, cloud computing, and composable infrastructure.<\/p>\n<p>XConn\u2019s sales space will reportedly function a completely standards-based setup, however till benchmarks are launched, it&#8217;s troublesome to find out how a lot enchancment customers can anticipate in comparison with present PCIe Gen 5 deployments.<\/p>\n<p>XConn has additionally partnered with ScaleFlux to enhance CXL 3.1 interoperability for AI and cloud infrastructure.<\/p>\n<p>Whereas this means momentum, it doesn&#8217;t affirm how nicely the answer integrates with the sorts of workloads presently stressing immediately&#8217;s architectures.<\/p>\n<p>The implications for high-speed storage are important if the know-how delivers.<\/p>\n<p>With rising demand for the <a data-analytics-id=\"inline-link\" href=\"https:\/\/www.techradar.com\/best\/large-hard-drives-and-ssds\" data-before-rewrite-localise=\"https:\/\/www.techradar.com\/best\/large-hard-drives-and-ssds\">largest SSD<\/a> capacities and the <a data-analytics-id=\"inline-link\" href=\"https:\/\/www.techradar.com\/pro\/fastest-ssds\" data-before-rewrite-localise=\"https:\/\/www.techradar.com\/pro\/fastest-ssds\">fastest SSD<\/a> efficiency, PCIe Gen 6 may help quicker information transfers between storage units and processing items.<\/p>\n<p>Nonetheless, these theoretical features have to be tempered with skepticism till area information confirms the impression.<\/p>\n<p>XConn\u2019s demo could nicely mark the start of the following chapter in AI {hardware}. However for now, it stays a preview, not a proof level.<\/p>\n<p>Through <a data-analytics-id=\"inline-link\" href=\"https:\/\/www.techpowerup.com\/339633\/xconn-technologies-to-demo-end-to-end-pcie-gen-6-at-fms25\" target=\"_blank\" rel=\"nofollow\" data-url=\"https:\/\/www.techpowerup.com\/339633\/xconn-technologies-to-demo-end-to-end-pcie-gen-6-at-fms25\" referrerpolicy=\"no-referrer-when-downgrade\" data-hl-processed=\"none\">Techpowerup<\/a><\/p>\n<p><a id=\"elk-you-might-also-like\" data-url=\"\" href=\"\" data-hl-processed=\"none\"\/><\/p>\n<h3 class=\"article-body__section\" id=\"section-you-might-also-like\"><span>You might also like<\/span><\/h3>\n<\/div>\n<iframe data-lazy=\"true\" data-src=\"https:\/\/www.fiverr.com\/gig_widgets?id=U2FsdGVkX18x7XQvttUTrv1oEqmGNGTgvvCUiUoJ\/AP4z\/UyMz8lXGOLpu15jIMxBbTR0gmD5uBoFvhC4KWeALQRp3h\/X\/AwcVD0K8Wj9H\/ZzYKzcCNHosB9oS4SCJJFWiN85P9ICAc4OgCoE\/wHKIY7CDkf2\/DQ1vqGvk4smVe5cRDEmrLPCWi4FC8p40VUhSmWQ5udCm0zoJtorgWv3vbDQw0kKYkwn39ozAnQXDe+YvWMxkLFWA+O3TFwkJvdkIK+\/AUSnRssPKt5WHY0FhNOxnSPcLslEL4G4\/RfP95ve99U+kRnDy3X+KtzdQLY+u935ghON\/o3UE4IMv9oN6JX9RnxzL\/LRcOgnHigxStSGPKsZYtnz8RWNVT\/rOLAibqiWJadC5MYHRbekF3eg6FOGrQGkXYbsn0+a5aovnlLCbLwIqY9fcS17UX8J235iQ6cdmHNbrPeS84CMm34RA==&affiliate_id=1052423&strip_google_tagmanager=true\" loading=\"lazy\" data-with-title=\"true\" class=\"fiverr_nga_frame\" frameborder=\"0\" height=\"350\" width=\"100%\" referrerpolicy=\"no-referrer-when-downgrade\" data-mode=\"random_gigs\" onload=\" var frame = this; var script = document.createElement('script'); script.addEventListener('load', function() { window.FW_SDK.register(frame); }); script.setAttribute('src', 'https:\/\/www.fiverr.com\/gig_widgets\/sdk'); document.body.appendChild(script); \" ><\/iframe>\n<br \/><a href=\"https:\/\/www.techradar.com\/pro\/the-next-stage-in-ai-power-xconn-set-to-reveal-end-to-end-pcie-gen-6-offering-higher-bandwidth-than-ever\">Source link <\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Apollo 2 change helps Gen 6.2 and CXL 3.1 inside a single hybrid chip XConn desires to redefine bandwidth limits, however real-world outcomes stay fully&#8230;<\/p>\n","protected":false},"author":1,"featured_media":89179,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[7],"tags":[],"class_list":["post-89178","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-tech-universe"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.4 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>XConn\u2019s new PCIe Gen 6 switch might shake up AI data centers faster than anyone expected - mailinvest.blog<\/title>\n<meta name=\"description\" content=\"Technology is forever changing, and there are always new pieces of technology to replace obsolete ones. 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