{"id":13446,"date":"2022-02-15T12:38:06","date_gmt":"2022-02-15T12:38:06","guid":{"rendered":"https:\/\/mailinvest.blog\/index.php\/2022\/02\/15\/amds-milan-x-goes-head-to-head-with-intels-sapphire-rapids-in-leaked-benchmarks\/"},"modified":"2022-02-15T12:38:06","modified_gmt":"2022-02-15T12:38:06","slug":"amds-milan-x-goes-head-to-head-with-intels-sapphire-rapids-in-leaked-benchmarks","status":"publish","type":"post","link":"https:\/\/mailinvest.blog\/index.php\/2022\/02\/15\/amds-milan-x-goes-head-to-head-with-intels-sapphire-rapids-in-leaked-benchmarks\/","title":{"rendered":"AMD’s Milan-X Goes Head to Head with Intel’s Sapphire Rapids in Leaked Benchmarks"},"content":{"rendered":"

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\n \t \t \"AMD-Epyc-Feature-3\"<\/div>\n<\/p><\/div>\n

Intel\u2019s Sapphire Rapids server platform is critical to the company\u2019s plans to retake overall performance and market leadership from AMD. There isn\u2019t a lot of information on how Sapphire Rapids\u2019 performance compares to Ice Lake or to AMD\u2019s upcoming Milan-X\u00a0 yet, but leaked benchmarks shed a little light on the match-up.<\/p>\n

Leaker Yuuki_AnS tested<\/a> a pair of Sapphire Rapids ES2 (Engineering Sample 2) CPUs against two
Xeon Platinum 8380s and two AMD Epyc 7773X Milan-X CPUs. He didn\u2019t say if the Xeon Platinum 8380 or Milan-X 7773X CPUs were ES chips. The 7773X engineering samples already in-market run 100MHz lower clocks than the retail models.<\/p>\n

Yuuki_AnS also notes that Sapphire Rapids\u2019 AVX-512 support is not enabled and that the BIOS isn\u2019t optimized. The Ice Lake-SP system has 80 cores total, Sapphire Rapids has 96, and Milan-X fields 128. This Sapphire Rapids CPU does not include onboard HBM2. Intel\u2019s DDR4\/DDR5 RAM speeds were not given.<\/p>\n

The AMD Epyc CPU is using DDR4-2800, not its official maximum spec of DDR4-3200. This is unlikely to impact Cinebench scores, but might impact V-ray or CPU-Z.<\/p>\n

We\u2019ve charted Yuuki_AnS\u2019s results<\/a> below:<\/p>\n

\"\"<\/a><\/em><\/p>\n

The results are mixed. According to Yuuki_AnS, CB23 scores should be around ~80K, considerably closer to the Epyc 7773X. There isn\u2019t much of a gap between the Ice Lake-SP and Sapphire Rapids, but we expect that to change as UEFI support improves. A score of ~80K in CB23 would imply Sapphire Rapids\u2019 performance scales in line with its increased core count in that benchmark.<\/p>\n

It is unclear whether the benchmarks Yuuki_AnS ran would benefit from additional L3. Milan-X\u2019s boosted L3 improves performance by reducing memory access latency and relieving memory bandwidth pressure. Interestingly, Milan-X\u2019s cache latency compares well against Intel, but its main memory latency is higher.<\/p>\n

The Upcoming 2022 Server Slugging Match<\/h3>\n

If we assume that Sapphire Rapids performance improves by 1.15x \u2013 1.2x between now and launch, it seems AMD might have a fight on its hands. Epyc built an increasingly large advantage over Xeon over the past few years. The launch of Ice Lake-SP last year reduced AMD\u2019s Zen 3 advantage but didn\u2019t eliminate it.<\/p>\n

Sapphire Rapids is built on the same Golden Cove architecture as Alder Lake and could conceivably challenge AMD with a smaller number of cores. Milan-X adds an additional 64MB of L3 cache per chiplet to AMD\u2019s Zen 3 Epyc CPUs, but Zen 4 (codename Genoa) arrives later in 2022 as well. Like Sapphire Rapids, Genoa will be a DDR5-based chip.<\/p>\n

Milan-X is a preview of AMD\u2019s strategy of building additional L3 into its CPUs. We expect the company to use this strategy for Genoa as well. Depending on when Intel ships Sapphire Rapids in volume, its Alder Lake-derived P-cores may face off against Zen 4 more directly than Zen 3.<\/p>\n

Both AMD and Intel have good reason to defend this market. Server revenue has long been key to Intel\u2019s margins and overall income and AMD wants to keep the share it has gained. Milan-X is expected to improve performance by up to 15 percent over Milan in specific tests. Zen 4 may deliver a 1.15x \u2013 1.25x improvement over Zen 3, separate from the impact of the larger L3 cache.<\/p>\n

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